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TSMC tie-up puts spotlight on Japan's hidden chip champions

Taiwanese star enlists Ibiden, JSR and others for energy-saving 3D integration

A Taiwan Semiconductor Manufacturing Co. fab: The company has established a research hub in Japan. (Photo courtesy of TSMC)

TOKYO -- Japan's semiconductor industry has attracted newfound attention as the race to build ever more powerful chips pushes development in a new direction: up.

Japan's concentration of the technology needed to stack chip layers has drawn the world's biggest contract chipmaker, Taiwan Semiconductor Manufacturing Co., into a new research and development center in the country. TSMC will partner with some of the top semiconductor industry players here, including chip packaging provider Ibiden, materials supplier JSR and cutting device maker Disco.

For Tokyo officials, the Taiwanese company's move marked a much-needed vote of confidence. Many Japanese government-led initiatives to support innovation have failed to lead to meaningful new businesses. The hope is that this time, the tie-up with TSMC will boost Japanese competitiveness in 3D semiconductor technology, putting the country at the cutting edge of chip R&D.

"If we didn't have Ibiden, we would not have been able to bring TSMC to Japan," a senior official at the Ministry of Economy, Trade and Industry said.

The nerve center of this Taiwanese-Japanese collaboration is located in a clean room at the National Institute of Advanced Industrial Science and Technology in Tsukuba, a city northeast of Tokyo that is synonymous with research in Japan.

Their goal is 3D integration, which involves layering chip components. This allows chips to go beyond the limits of miniaturization in two dimensions.

A blade spins at a Disco R&D center: The Japanese company holds a roughly 70% global market share in dicing saws for chipmaking. (Photo courtesy of Disco)

3D integration reduces the energy needed to transfer data to about a thousandth of 2D constructions. Systems using the semiconductors will be able to realize energy savings on a large scale. The tech is expected to make data centers more energy efficient and raise the performance of artificial intelligence applications. Intel in the U.S. and South Korea's Samsung Electronics are also competing in this field.

Semiconductor manufacturing is divided into two broad segments. Front-end processes form circuit patterns on silicon wafers. Back-end processes cover everything from assembly to testing, and are a strength of Japan's semiconductor industry, which has ceded the front-end lead it held in the 1980s.

To stack chips and substrates, the layers need to be aligned with extreme precision. But that is not all. Making 3D integration practical requires comprehensive manufacturing know-how for boosting productivity and heat elimination.

TSMC announced the establishment its subsidiary Japan 3DIC Research and Development Center in February, fulfilling part of METI's plans to draw the company to this country. When METI unveiled a list of over 20 TSMC's partner enterprises on May 31, the share prices of named companies jumped.

Disco holds a roughly 70% share in dicers for chip cutting. Shibaura Mechatronics makes bonders for state-of-the-art packaging processes. The company's equipment is capable of layering chips in high density for use in high-end smartphones.

Ibiden and Shinko Electric Industries are virtually unrivaled in high-performance package substrates. The two have a long track record in joint R&D with Intel. Showa Denko Materials makes materials for chip packaging processes.

JSR, Tokyo Ohka Kogyo and other Japanese players hold most of the global market in photoresists, used in the circuit etching. Shin-Etsu Chemical, which boasts highest share in silicon wafers at roughly 30%, is one also of TSMC's partners.

TSMC's R&D center will serve to eliminate the risks posed by COVID-19 travel restrictions or paperwork needed to transport materials across borders. This will lower the hurdles to collaboration for small and midsized Japanese materials suppliers.

The need for 3D integration has arisen from the limitations of miniaturization. Packing more circuits into each die produces only marginal improvements in performance, leading to diminishing returns on investment.

Moore's Law, which observes that the number of transistors in an integrated circuit doubles every 18 months, is becoming a thing of the past as the pace of advancements slows below this level. Intel and other big names have repeatedly pushed back their road map for miniaturization. Deliveries of advanced production equipment to Intel have suffered delays, and one supplier reports a run-up in inventory.

3D integration offers a chance for a "more than Moore" model that goes beyond shrinking to improve performance. Back-end processes are key to realizing this next stage of advancements.

"The added value of the back end will rise going forward, and Japan will be able to make use of its potential," said Hideki Wakabayashi, professor at the Tokyo University of Science.

One driver is the concentration of chip demand from the auto and robotics industries. These fields will require specialized semiconductors suited to each manufacturer's needs.

3D integration will also promote further diversification of semiconductors. Chipmaking companies can work closely with Japanese electronics manufacturers, such as TDK, Murata Manufacturing and Rohm, to produce so-called hybrid integrated circuits that bundle electronic components with semiconductors.

"Japan will be able to regain its competitive advantage in semiconductors if it takes the lead in the back end," said Wakabayashi.

This month, METI embarked on an initiative to draw chipmakers to Japan and promote the domestic manufacturing of advanced semiconductors.

"We want to see semiconductor plants built in Japan as soon as possible, but the reality is that Japan needs to first polish up its strengths," said Masaki Tone, a METI official in charge of device and semiconductor strategy.

If Japanese chip companies reach a high degree of sophistication in back-end technology "they'll be able to expand to the front-end step of wafer processing," said Tadahiro Kuroda, a professor at the University of Tokyo who is one of the leading experts on 3D integration technology.

Although Japan has an edge at the back end, most of these players are small and lack deep pockets. This puts them at a disadvantage in an industry where capital expenditures and R&D costs are constantly rising.

"Having a small scale means major overseas companies will not take you seriously," said Wakabayashi. "A realignment of the industry is one option for raising [Japan's] competitiveness."

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