TOKYO -- There are limits to how small circuits can get on flat computer chips. As such, the industry is looking beyond, into a new dimension, literally.
The effort to make semiconductor devices smaller using conventional techniques is hitting a wall in two respects. First, it is technically difficult to shrink features below 10 nanometers. Second, even if the technologies become available to fabricate circuit elements even smaller, physics will intervene, as the electrons themselves that travel these circuits would be so close that they would interfere with each other.
Instead of trying to go ever smaller on one plane, why not start stacking? Chipmakers are starting to do just that. After a decade of research, Samsung Electronics announced in August last year that it had begun mass-producing 3-D NAND flash memory.
NAND flash memory is slower than DRAM, but it retains data even without a power source. That feature has made NAND flash the memory of choice for storing pictures and music files in portable gadgets.
The South Korean electronics giant has stacked 24 layers of memory cells to fabricate a 128-gigabit 3-D NAND flash memory. By 2017, it intends to make chips with as many as 100 layers.
A 3-D NAND flash device has the potential of storing 1 terabit of data, far beyond the 256-gigabit limit of planar memory.
Toshiba, too, is going 3-D and plans to invest as much as 500 billion yen ($4.84 billion) to mass-produce 3-D NAND flash starting in 2016.
Bigger, but smaller
However, 3-D NAND flash chips are not easy to make. Electrical conduits that can carry data through the layers of memory cells make miniaturization harder, due to technical difficulties in situating these vertical connections. This means some extra space must be made. But by stacking layers, 3-D NAND flash can, as a whole, be smaller than conventional NAND flash, and perform better.
The real problem is that yields tend to be low and costs high. This is why Samsung is promoting its 3-D NAND flash mainly for use in servers that handle big data used by corporations and research institutions, where performance trumps cost.
As economies of scale push down costs, 3-D NAND flash memory could become a driving force popularizing the adoption of wearable gadgets.
While 3-D NAND flash memory can be built from layers of memory cells that use the conventional planar paradigm, the semiconductor industry has also begun adding a third dimension to the individual circuit elements.
U.S. semiconductor giant Intel adopted this design concept for the microprocessors it introduced in 2012.
When the pathways for electrons in transistors become too narrow, there are problems with electron leakage and excessive power consumption. To overcome these problems, Intel stretched the electron pathway vertically, creating a thickened structure on the planar chip. Resembling the dorsal fin of a fish, this thicker cross-sectional pathway accommodates the smoother flow of electrons.
Fabricating a semiconductor device involves more than 400 steps, and it is difficult to make chips at low cost in mass production without employing a variety of technologies. This means that the widespread adoption of 3-D chips will rely on the companies that design and make semiconductor manufacturing equipment.
Hitachi Kokusai Electric, which makes machines to fabricate thin layers of insulation material on wafers, is figuring out ways to place these films on 3-D chips. The challenge is to place insulation not only on the flat surfaces, but also on the sides of the components that stick up from the wafer. The films need to be of uniform thickness. As such, the company is developing a technology that runs at a lower temperature to form the films slowly and precisely.
Hitachi High-Technologies is the global leader in critical-dimension scanning electron microscopes, which measure the patterns of circuit diagrams as they are being formed. For 3-D chips, these microscopes need to measure not just planar patterns, but also trenches and holes. The company is working to establish a technology that ensures that the electron beam is directed correctly on these 3-D structures.
Tokyo Electron and Hitachi High-Technologies both make machines used to etch circuits. The machines for 3-D chips require greater precision than those for planar chips. Both companies are at the prototype stage.
The World Semiconductor Trade Statistics forecasts that the global market for semiconductors will grow by 15% from 2013 to 2016. This translates to $350 billion in added growth, and 3-D chips could be a major part of this.